This is due to the fact that human reasoning and algorithms resemble a sequential process.Īn example can further clarify this. This abstract behavior description can sometimes make the circuit design simpler. Sequential statements allow us to describe the abstract behavior of a circuit rather than use low-level components, such as different logic gates, to build the circuit. However, for a number of reasons, VHDL provides us with several sequential statements where the order of statements is important: Sequential Statements Facilitate Abstract Circuit Description Hence, theoretically, the concurrent statements are sufficient to describe an arbitrary digital circuit. With these concurrent statements, we can implement different logic gates. So concurrent statements are evaluated simultaneously and have a clear mapping into the hardware components. That’s why we call them concurrent statements. Line 5 specifies an OR gate with the output out1 and the inputs sig1 and c.Īs discussed in a previous article, to correctly describe the physical components of Figure 1, the synthesis software evaluates the lines of this code simultaneously. For example, line 2 becomes a wire in the final design which is labeled sig1 in the figure. Each of these lines has a clear mapping into the hardware schematic shown in Figure 1. 1 architecture Behavioral of comb1 isĬonsider lines 2, 4, 5, and 6 of this code. The architecture of the VHDL code for this circuit is shown below. For example, we can use VHDL to describe the circuit in Figure 1. VHDL is a hardware description language which can be used to tell the synthesis software what physical components need to be added to the design and how these components are connected to each other. Please check out my article on getting started with VHDL for more introductory information. This article will try to develop a better understanding of the sequential statement’s importance. In a previous article, we looked at some concurrent VHDL statements. This article will try to develop a better understanding of the sequential statement’s importance in VHDL.
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